Automated summary

A complete reference example of a ReLU element-wise operator written in Triton for the Ascend backend, using a grid-stride loop, 1D tiling and border masking.

Strengths

Gives a concrete, reusable skeleton for any element-wise Triton Ascend operator
Demonstrates the single-axis grid-stride loop with a constant CORE_NUM to spread work across vector cores
Reads the vector-core count from device properties and falls back to 40 when unavailable
Masking with other=0.0 is already handled, preventing out-of-bounds loads and stores

Limitations

Covers ReLU only: nothing on two-input operators, broadcasting or reductions
BLOCK_SIZE is hard-coded to 1024 with no autotuning or performance measurement
No numerical validation or comparison against torch.nn.ReLU is included
Thin on Ascend-specific caveats such as supported dtypes and compiler constraints

When to use it

Use it as the structural template when generating or reviewing an element-wise Triton Ascend kernel for Atlas A2/A3 hardware.

When not to use it

Avoid it for non-element-wise work such as matmul, reductions or attention, or for Triton on NVIDIA GPUs where grid constraints differ.

Security analysis

Safe

Quality score78/100

The skill is a self-contained PyTorch/Triton code example that compiles a ReLU elementwise kernel and runs it on Ascend NPU hardware. It performs no shell execution, no network access, no file or credential handling, and no obfuscation; the only runtime side effects are allocating a device tensor and launching a kernel. The bare 'except:' around device-property probing silently falls back to a default core count rather than hiding anything dangerous.

No concerns found

How this analysis is made

Examples

Generate a GELU kernel from the template

Using the Triton Ascend ReLU example as a template, write an element-wise GELU kernel with the same 1D grid-stride loop and border masking, targeting Atlas A2.

Adapt block size and core count

Take this Triton Ascend ReLU kernel and make BLOCK_SIZE configurable per input size instead of hard-coded 1024, keeping the vector-core grid-stride structure.

Review a new elementwise kernel

Review my Triton Ascend element-wise kernel against the ReLU example and tell me whether the masking, grid-stride loop and vector-core handling are correct.

name: triton-ascend-example-relu description: "The full Triton Ascend example of the ReLU element by element operator. The standard mode for demonstrating vector 's element by element operation: 1D split, mask border processing, staggering. The code structure of this example can be consulted when generating the elementwise type operator." category: example version: "1.0.0" metadata: backend: ascend dsl: triton_ascend hardware: "Atlas A2, Atlas A3" operator_type: "elementwise" framework: torch

ReLU - Triton Ascend

Name: Triton Ascend ReLU Example
Author: Skills Guide Bot

import torch
import triton
import triton.language as tl


@triton.jit
def relu_kernel(
    x_ptr, y_ptr,
    n_elements,
    BLOCK_SIZE: tl.constexpr, CORE_NUM: tl.constexpr,
):
    pid = tl.program_id(0)
    num_blocks = tl.cdiv(n_elements, BLOCK_SIZE)
    for block_id in range(pid, num_blocks, CORE_NUM):
        offsets = block_id * BLOCK_SIZE + tl.arange(0, BLOCK_SIZE)
        mask = offsets < n_elements
        x = tl.load(x_ptr + offsets, mask=mask, other=0.0)
        y = tl.maximum(x, 0.0)
        tl.store(y_ptr + offsets, y, mask=mask)


class ModelNew(torch.nn.Module):
    def __init__(self):
        super().__init__()
        try:
            import torch
            import triton
            device = torch.npu.current_device()
            properties = triton.runtime.driver.active.utils.get_device_properties(device)
            self.VEC_CORE_NUM = properties.get("num_vectorcore", 40)
        except:
            self.VEC_CORE_NUM = 40

    def forward(self, x):
        if not x.is_contiguous():
            x = x.contiguous()
        y = torch.empty_like(x)
        n_elements = x.numel()
        BLOCK_SIZE = 1024
        grid = (self.VEC_CORE_NUM,)
        relu_kernel[grid](x, y, n_elements, BLOCK_SIZE=BLOCK_SIZE, CORE_NUM=self.VEC_CORE_NUM)
        return y

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3. Load the skill

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Claude Code

test -f '.skill-downloads/triton-ascend-relu-example-ms9wnz8c/SKILL.md' && test -s '.skill-downloads/triton-ascend-relu-example-ms9wnz8c/SKILL.md' && mkdir -p '.claude/skills' && test ! -e '.claude/skills/triton-ascend-example-relu' && cp -R '.skill-downloads/triton-ascend-relu-example-ms9wnz8c' '.claude/skills/triton-ascend-example-relu'

Cursor

test -f '.skill-downloads/triton-ascend-relu-example-ms9wnz8c/SKILL.md' && test -s '.skill-downloads/triton-ascend-relu-example-ms9wnz8c/SKILL.md' && mkdir -p '.cursor/skills' && test ! -e '.cursor/skills/triton-ascend-example-relu' && cp -R '.skill-downloads/triton-ascend-relu-example-ms9wnz8c' '.cursor/skills/triton-ascend-example-relu'

Codex

test -f '.skill-downloads/triton-ascend-relu-example-ms9wnz8c/SKILL.md' && test -s '.skill-downloads/triton-ascend-relu-example-ms9wnz8c/SKILL.md' && mkdir -p '.agents/skills' && test ! -e '.agents/skills/triton-ascend-example-relu' && cp -R '.skill-downloads/triton-ascend-relu-example-ms9wnz8c' '.agents/skills/triton-ascend-example-relu'

OpenSkills

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Official OpenSkills installation

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For an agent that reads AGENTS.md, then sync the index. This command changes AGENTS.md: review the diff before using it.

openskills sync

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4. Try a first task

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Read .skill-downloads/triton-ascend-relu-example-ms9wnz8c/SKILL.md and apply its instructions to this example: [describe a test input]. Identify any missing files, dependencies or access. Produce the result requested by the skill without inventing data or running unreviewed scripts.

Expected result: output matching the skill instructions, or a precise list of missing prerequisites. A read confirmation alone does not validate a first use. If an external resource is unavailable, that path remains untested.

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